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NXP Semiconductors /MK65F18 /ENET /EIMR

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Interpret as EIMR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TS_TIMER)TS_TIMER 0 (TS_AVAIL)TS_AVAIL 0 (WAKEUP)WAKEUP 0 (PLR)PLR 0 (UN)UN 0 (RL)RL 0 (LC)LC 0 (EBERR)EBERR 0 (MII)MII 0 (RXB)RXB 0 (RXF)RXF 0 (0)TXB 0 (0)TXF 0 (0)GRA 0 (0)BABT 0 (0)BABR

BABR=0, TXB=0, TXF=0, BABT=0, GRA=0

Description

Interrupt Mask Register

Fields

TS_TIMER

TS_TIMER Interrupt Mask
TS_AVAIL

TS_AVAIL Interrupt Mask
WAKEUP

WAKEUP Interrupt Mask
PLR

PLR Interrupt Mask
UN

UN Interrupt Mask
RL

RL Interrupt Mask
LC

LC Interrupt Mask
EBERR

EBERR Interrupt Mask
MII

MII Interrupt Mask
RXB

RXB Interrupt Mask
RXF

RXF Interrupt Mask
TXB

TXB Interrupt Mask

0 (0): The corresponding interrupt source is masked.

1 (1): The corresponding interrupt source is not masked.
TXF

TXF Interrupt Mask

0 (0): The corresponding interrupt source is masked.

1 (1): The corresponding interrupt source is not masked.
GRA

GRA Interrupt Mask

0 (0): The corresponding interrupt source is masked.

1 (1): The corresponding interrupt source is not masked.
BABT

BABT Interrupt Mask

0 (0): The corresponding interrupt source is masked.

1 (1): The corresponding interrupt source is not masked.
BABR

BABR Interrupt Mask

0 (0): The corresponding interrupt source is masked.

1 (1): The corresponding interrupt source is not masked.

Links

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Register License

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data